Adaptive DVFS(Dynamic Voltage And Frequency Scaling) Controller Using FSM In Verilog

Abstract

Power consumption has become a major concern in modern digital and embedded systems due to increasing performance demands and shrinking device sizes. Dynamic Voltage and Frequency Scaling (DVFS) is an effective low-power technique that reduces energy consumption by adjusting voltage and frequency according to system workload. However, conventional DVFS implementations rely on fixed operating modes and lack adaptive decision-making capability. This paper presents an Adaptive DVFS controller implemented using a Finite State Machine (FSM) in Verilog. In the first phase, a basic DVFS architecture is designed to demonstrate voltage and frequency scaling across multiple operating modes. In the second phase, an FSM-based adaptive control mechanism is introduced to dynamically select optimal voltage-frequency states based on workload conditions. The proposed design is modeled at the RTL level and verified through simulation using Vivado. Results demonstrate improved power-performance adaptability compared to traditional DVFS techniques, making the design suitable for low-power embedded and real-time applications.